1. Field of the Invention
The present invention relates to switching mode power converter circuits, and more particularly, to an improved method and apparatus for monitoring the current sent to the load associated with a power converter circuit.
2. Description of Related Art
Switched mode DC-to-DC power converters are commonly used in the electronics industry to convert an available direct current (DC) level voltage to another DC level voltage. A switched mode converter provides a regulated DC output voltage by selectively storing energy by switching the flow of current into an output inductor coupled to a load. A synchronous buck converter is a particular type of switched mode converter that uses two power switches, such as MOSFET transistors, to control the flow of current in the output inductor. A high-side switch selectively couples the inductor to a positive power supply while a low-side switch selectively couples the inductor to ground. A pulse width modulation (PWM) control circuit is used to control the gating of the high-side and low-side switches in an alternating manner. Synchronous buck converters generally offer high efficiency and high power density, particularly when MOSFET devices are used due to their relatively low on-resistance.
To regulate the performance of a synchronous buck converter, it is known to monitor the amount of current sent to the load. This information is important to protect the load from damage caused by excessive current, to ensure that sufficient current is delivered to the load in view of changing load conditions (i.e., controlling voltage “droop” caused by a step load), and to permit current sharing between phases of multi-phase configurations. One approach to measuring the load current is to include a sensing resistor in series with the output inductor and to monitor the voltage drop across the sensing resistor. The sensing resistor must have a resistance value large enough to keep the sensed voltage signal above the noise floor, as the voltage drop can be measured more accurately with a higher resistance value. A significant drawback of this approach is that the sensing resistor wastes the output energy and thereby reduces the efficiency of the synchronous buck converter. Moreover, the sensing resistor generates heat that must be removed from the system.
To overcome this drawback, it is known to use a lossless current sense circuit in which a current sensor is coupled to the output inductor. The current sensor provides the current sense signal to the pulse width modulation circuit corresponding to current passing through an internal DC resistance of the output inductor. The current sensor further includes a resistance-capacitance (RC) filter that includes an on-state resistance of the power switch. A simplified circuit schematic of a synchronous buck converter 20 with an RC filter-based lossless current sensing scheme is shown in FIG. 1, in which: vC(t) is the voltage across the sense capacitor Cs; IL(t) is the current in the output inductor L; Vin is the DC input voltage: and Vo is the DC output voltage. The equivalent series resistance (ESR) of the output inductor is RL. It is assumed that the MOSFETs 22 and 24 are driven complementarily with a duty ratio D and (1-D) respectively at frequency fs.
The idea of lossless current sensing is to detect the inductor current iL signal by sensing capacitor voltage vC. It is well known that when the matching condition
            R      s        ⁢          C      S        =      L          R      L      is satisfied, vC(t) follows RL iL(t) exactly.
An improvement of the lossless current sensing scheme is disclosed in U.S. Pat. No. 6,441,597, titled “Method and Apparatus for Sensing Output Inductor Current in a DC-to-DC Power Converter,” issued Aug. 27, 2002, the content of which is incorporated herein in its entirety by reference. With reference to FIG. 2, there is provided a power converter 26 comprising power switches 28 and 30. One end of the RC filter is detached from the phase node (PN) 32 and is connected to a virtual phase node (VPN) 38 generated by a small signal totem pole circuit including switches 34 and 36. The small signal totem pole is integrated in a control IC with bipolar (or CMOS) technology. Base drive signals Vbe3 and Vbe4 are designed to closely follow the gate drive signals of the power MOSFETs 34 and 36, respectively. Here, the Rds(on) of the top power MOSFET is denoted as Rds1, and the Rds(on) of the bottom power MOSFET is denoted as Rds2, so that the Rds(on) of the MOSFET devices is included in the resistance for current sensing. When the circuit is operated at frequency fs with switching period Ts (1/fs) with input voltage Vin and output voltage Vo, typical circuit waveforms are shown in FIG. 3. Specifically, when the circuit parameter condition in accordance with the above equation is met, the voltage waveform across Cs is the same as the inductor current waveform iL with:vCs(t)=ReqiL where, Req=Rdc for the circuit in FIG. 1, Req=DRds1+(1-D)Rds2+RL for the circuit in FIG. 2, and D=Vo/Vin. From the above equation, the voltage ripple on Cs is:ΔvCs(t)=ReqΔiL The relations expressed in the two foregoing equations are also shown in FIG. 4. Specifically, trace 40 represents vpn, trace 42 represents iL, and trace 44 represents vC. Furthermore, the inductor current peak-to-peak current ripple is:
      Δ    ⁢                  ⁢          i      L        =                    V        in                    Lf        s              ⁢          D      ⁡              (                  1          -          D                )            and the sensed voltage peak-to-peak value is:
      Δ    ⁢                  ⁢          V      c        =                    V        in                    Lf        s              ⁢          D      ⁡              (                  1          -          D                )              ⁢          R      eq      
For one exemplary application, wherein Vin=12 V, fs=311 kHz, L=1.8 uH, RL=3.3 mOhm with inductive current sense, the relation between the sensed voltage peak-to-peak vs. the output voltage is shown in graph 46 of FIG. 5. As the duty ratio D approaches 0 or 1, the sensed voltage ripple can get very small and easily lead to pulse skipping or abnormal switching. The consequences of this include (1) increased output voltage ripple, (2) degraded EMI condition, (3) reduced circuit stability region, and (4) over stress of the power circuitry components.
Accordingly, it would be desirable to provide a way to accurately sense the output inductor current delivered to a load by a buck-type DC-to-DC switched mode power converter even when the duty ratio D approaches 0 or 1.